DocumentCode :
2957747
Title :
Design of Cascaded Continuous-Time Sigma-Delta Modulators
Author :
Paton, Susana ; Sanchez-Renedo, Manuel ; Hernandez, L. ; Prefasi, Enrique ; Wiesbauer, Andreas ; Giandomenico, Antonio Di ; Segundo, David San
Author_Institution :
Univ. Carlos III de Madrid, Madrid
fYear :
2006
fDate :
10-13 Dec. 2006
Firstpage :
50
Lastpage :
53
Abstract :
Cascaded sigma-delta modulators implemented with continuous-time circuits are becoming popular due to its high potential to build high resolution, high bandwidth A/D converters. This paper shows a survey of the recent advances in this field. Architecture selection together with some design aspects are discussed for low oversampling ratio applications. The design of noise cancellation logic and the influence of integrator gain errors are also discussed. Finally some new challenges are proposed for next designs.
Keywords :
analogue-digital conversion; continuous time systems; delta-sigma modulation; integrating circuits; A/D converters; continuous time circuits; continuous time sigma delta modulator design; integrator gain errors; noise cancellation logic; Bandwidth; Circuits; Clocks; Delta modulation; Delta-sigma modulation; Finite impulse response filter; Jitter; Logic design; Noise cancellation; Quantization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on
Conference_Location :
Nice
Print_ISBN :
1-4244-0395-2
Electronic_ISBN :
1-4244-0395-2
Type :
conf
DOI :
10.1109/ICECS.2006.379698
Filename :
4263301
Link To Document :
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