Title :
Using FPGA technology towards the design of an adaptive fault tolerant framework
Author :
Erdogan, Sevki ; Gersting, Judith L. ; Shaneyfelt, Ted ; Duke, Eugene L.
Author_Institution :
Hawaii Univ., Hilo, HI, USA
Abstract :
In this paper we propose architecture for a reconfigurable, adaptive, fault-tolerant (RAFT) framework for application in real time systems with require multiple levels of redundancy and protection. Typical application environments include distributed processing, fault-tolerant computation, and mission and safety-critical systems. The framework uses field programmable gate array (FPGA) technologies with on the fly partial programmability achieving reconfiguration of a system component when the existing components fail or to provide extra reliability as required in the specification. The framework proposes the use an array of FPGA devices to implement a system that, after detecting an error caused by a fault, can adoptively reconfigure itself to achieve fault tolerance. The FPGAs that are becoming widely available at a low cost are exploited by defining a system model that allows the system user to define various levels of reliability choices, providing a monitoring layer for the system engineer.
Keywords :
fault tolerant computing; field programmable gate arrays; reconfigurable architectures; FPGA; distributed processing; fault-tolerant computating; field programmable gate array; fly partial programmability; mission-critical system; real time systems; reconfigurable adaptive fault-tolerant framework; reliability; safety-critical system; Computer architecture; Distributed computing; Distributed processing; Fault detection; Fault tolerance; Fault tolerant systems; Field programmable gate arrays; Protection; Real time systems; Redundancy; FPGA; Fault Tolerance; Modeling; reconfigurable;
Conference_Titel :
Systems, Man and Cybernetics, 2005 IEEE International Conference on
Print_ISBN :
0-7803-9298-1
DOI :
10.1109/ICSMC.2005.1571742