DocumentCode :
2958713
Title :
CMOS Realization of a Quantized-Output Classifier Circuit
Author :
Yildiz, Merih ; Minaei, Shahram ; Goknar, Izzet Cem
Author_Institution :
Dogus Univ., Istanbul
fYear :
2006
fDate :
10-13 Dec. 2006
Firstpage :
292
Lastpage :
295
Abstract :
In this paper a CMOS implementation of a multi-input data classifier with several output levels and a different architecture is presented. The proposed circuit operates in current-mode and can classify several types of analog vector data. The classifier circuit´s new architecture consists of the interconnections of core cells each possessing a current-voltage converter, an inverter followed by a NOR gate and a voltage-current output stage. Using 0.35 mum TSMC technology parameters, SPICE simulation results for a classifier with two inputs are included to verify the expected results.
Keywords :
CMOS integrated circuits; NOR circuits; current-mode circuits; logic design; pattern classification; CMOS technology; NOR gate; analog vector data; core cells; current-mode circuits; current-voltage converter; multi-input data classifier circuit; size 0.35 mum; Artificial neural networks; Circuit simulation; Data engineering; Integrated circuit interconnections; Inverters; Neurons; Object recognition; SPICE; Target recognition; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on
Conference_Location :
Nice
Print_ISBN :
1-4244-0395-2
Electronic_ISBN :
1-4244-0395-2
Type :
conf
DOI :
10.1109/ICECS.2006.379783
Filename :
4263361
Link To Document :
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