Title :
Graph Partitioning for Reconfigurable Topology
Author :
Ajwani, Deepak ; Ali, Shoukat ; Morrison, John P.
Author_Institution :
Centre for Unified Comput., Univ. Coll. Cork, Cork, Ireland
Abstract :
Optical circuit switches have recently been proposed as a low-cost, low-power and high-bandwidth alternative to electronic switches for the design of high-performance compute clusters. An added advantage of these switches is that they allow for a reconfiguration of the network topology to suit the requirements of the application. To realize the full potential of a high-performance computing system with a reconfigurable interconnect, there is a need to design algorithms for computing a topology that will allow for a high-throughput load distribution, while simultaneously partitioning the computational task graph of the application for the computed topology. In this paper, we propose a new framework that exploits such reconfigurable interconnects to achieve these interdependent goals, i.e., to iteratively co-optimize the network topology configuration, application partitioning and network flow routing to maximize throughput for a given application. We also present a novel way of computing a high-throughput initial topology based on the structural properties of the application to seed our co-optimizing framework. We show the value of our approach on synthetic graphs that emulate the key characteristics of a class of stream computing applications that require high throughput. Our experiments show that the proposed technique is fast and computes high-quality partitions of such graphs for a broad range of hardware parameters that varies the bottleneck from computation to communication.
Keywords :
graph theory; reconfigurable architectures; application partitioning; computational task graph; electronic switches; graph partitioning; high-performance compute cluster; high-throughput load distribution; network flow routing; network topology configuration; optical circuit switches; reconfigurable interconnect; reconfigurable topology; stream computing; synthetic graph; Integrated circuit interconnections; Network topology; Optical switches; Partitioning algorithms; Routing; Throughput; Topology; Graph-partitioning algorithms; Optical circuit switch; Reconfigurable topology; co-optimization;
Conference_Titel :
Parallel & Distributed Processing Symposium (IPDPS), 2012 IEEE 26th International
Conference_Location :
Shanghai
Print_ISBN :
978-1-4673-0975-2
DOI :
10.1109/IPDPS.2012.80