Title :
Scanning acoustic microscopy investigation of engineered flip-chip delamination
Author :
Hutt, D.A. ; Webb, D.P. ; Hung, K.C. ; Tang, C.W. ; Conway, P.P. ; Whalley, D.C. ; Chan, Y.C.
Author_Institution :
Dept. Manuf. Eng., Loughborough Univ., UK
Abstract :
The rapid uptake of flip-chip technology within the electronics industry is placing the reliability of such assemblies under increasing scrutiny. A key feature of the assembly process is application of underfill to reinforce the die attachment to the PCB. This has been identified in numerous studies as one of the major ways in which device reliability can be improved, by mitigating coefficient of thermal expansion mismatch between chip and board. However, in order for the underfill to be effective in coupling the die to the PCB, its adhesion to the passivation layer of the die and the solder mask layer on the PCB must be maximised. There is a growing body of literature that indicates that poor adhesion at either interface (delamination) due to contamination can result in premature assembly failure through stress fracture of the solder joints. In order to investigate further the effect of delamination on the reliability of flip-chip assemblies, surface chemistry has been used to control the adhesion of the underfill to the die passivation. This paper reports how modification of the die surface by application of a low surface energy coating, which prevents strong underfill adhesion, has enabled selective device delamination at the chip-to-underfill interface. Using scanning acoustic microscopy (SAM), the effectiveness of this treatment in creating controlled delamination before and after thermal cycling has been monitored. The ability to engineer delamination can enable experimental studies of the mechanics of flip chip assembly failure, which complement current finite element modelling work
Keywords :
acoustic microscopy; adhesion; delamination; failure analysis; flip-chip devices; fracture; integrated circuit interconnections; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; masks; microassembling; passivation; soldering; surface chemistry; surface contamination; surface energy; thermal expansion; thermal stresses; SAM; adhesion; assembly process; chip-to-underfill interface; coefficient of thermal expansion mismatch; controlled delamination; delamination; device reliability; die attachment; die passivation; die surface modification; die-PCB coupling; electronics industry; engineered flip-chip delamination; finite element modelling; flip chip assembly failure; flip-chip assemblies; flip-chip technology; interface contamination; low surface energy coating; passivation layer; premature assembly failure; reliability; scanning acoustic microscopy; selective device delamination; solder joint stress fracture; solder mask layer; surface chemistry; thermal cycling; underfill; underfill adhesion; underfill application; Acoustical engineering; Adhesives; Assembly; Delamination; Electronics industry; Microscopy; Passivation; Reliability engineering; Surface cracks; Surface treatment;
Conference_Titel :
Electronics Manufacturing Technology Symposium, 2000. Twenty-Sixth IEEE/CPMT International
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-6482-1
DOI :
10.1109/IEMT.2000.910728