DocumentCode
2959453
Title
NVMalloc: Exposing an Aggregate SSD Store as a Memory Partition in Extreme-Scale Machines
Author
Wang, Chao ; Vazhkudai, Sudharshan S. ; Ma, Xiaosong ; Meng, Fei ; Kim, Youngjae ; Engelmann, Christian
Author_Institution
Oak Ridge Nat. Lab., Oak Ridge, TN, USA
fYear
2012
fDate
21-25 May 2012
Firstpage
957
Lastpage
968
Abstract
DRAM is a precious resource in extreme-scale machines and is increasingly becoming scarce, mainly due to the growing number of cores per node. On future multi-petaflop and exaflop machines, the memory pressure is likely to be so severe that we need to rethink our memory usage models. Fortunately, the advent of non-volatile memory (NVM) offers a unique opportunity in this space. Current NVM offerings possess several desirable properties, such as low cost and power efficiency, but suffer from high latency and lifetime issues. We need rich techniques to be able to use them alongside DRAM. In this paper, we propose a novel approach for exploiting NVM as a secondary memory partition so that applications can explicitly allocate and manipulate memory regions therein. More specifically, we propose an NVMalloc library with a suite of services that enables applications to access a distributed NVM storage system. We have devised ways within NVMalloc so that the storage system, built from compute node-local NVM devices, can be accessed in a byte-addressable fashion using the memory mapped I/O interface. Our approach has the potential to re-energize out-of-core computations on large-scale machines by having applications allocate certain variables through NVMalloc, thereby increasing the overall memory capacity available. Our evaluation on a 128-core cluster shows that NVMalloc enables applications to compute problem sizes larger than the physical memory in a cost-effective manner. It can bring more performance/efficiency gain with increased computation time between NVM memory accesses or increased data access locality. In addition, our results suggest that while NVMalloc enables transparent access to NVM-resident variables, the explicit control it provides is crucial to optimize application performance.
Keywords
DRAM chips; parallel machines; random-access storage; 128-core cluster; DRAM; NVM-resident variables; NVMalloc library; aggregate SSD store; byte-addressable fashion; distributed NVM storage system; exaflop machines; extreme-scale machines; future multipetaflop machines; memory mapped IO interface; memory partition; memory regions; memory usage models; nonvolatile memory; secondary memory partition; Aggregates; Fuses; Libraries; Nonvolatile memory; Performance evaluation; Random access memory; Resource management;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel & Distributed Processing Symposium (IPDPS), 2012 IEEE 26th International
Conference_Location
Shanghai
ISSN
1530-2075
Print_ISBN
978-1-4673-0975-2
Type
conf
DOI
10.1109/IPDPS.2012.90
Filename
6267902
Link To Document