Title :
Lead-free bump interconnections for flip-chip applications
Author :
Karim, Zaheed S. ; Schetty, Rob
Author_Institution :
Adv. Interconnect Technol. Ltd., China
Abstract :
We describe the fabrication and characterization of five types of lead-free solder bumps for flip-chip packaging applications. Pb-free solder bumps were made from Sn, Sn-Bi, Sn-Cu, Sn-Ag, and Sn-Ag-Cu alloys. The Pb-free solder bumps were electroplated in a fountain plating system. Sn-Bi bumps with 80 wt.%Sn-20 wt.%Bi composition and melting point of 200°C were fabricated for eutectic Sn-Pb solder bump replacement. Pb-free bumps of Sn (melting point of 232°C), eutectic Sn-Cu with composition of 99.3 wt.%Sn-0.7 wt.%Cu (melting point of 227°C), and Sn-Ag with eutectic composition of 96.5 wt.%Sn-3.5 wt.%Ag (melting point of 221°C) were fabricated as replacements for high melting point high-Pb alloy solder bumps. Sn-Ag-Cu bumps with composition of 95.8 wt.%Sn-3.5 wt.%Ag-0.7 wt.%Cu (melting point of 216°C) were fabricated by sequential plating from binary Sn-Cu and Sn-Ag plating solutions. 20×20 Pb-free solder bump arrays, each of 200 μm diameter post-reflow on 400 μm pitch, were plated on Al-metallized daisy-chain test wafers. A 5 μm thick plated Cu under-bump-metal (UBM) layer was used and the as-plated bumps were reflowed in a 5-zone reflow oven. SEM, EDX and ball shear tests were used to characterize the bumps. The bumps were reflowed multiple times and subjected to ball shear tests to determine mechanical strength. Bumped daisy chain test dice were also flip-chip bonded on FR-4 and BT-epoxy substrates and subjected to die shear tests to determine suitability for FCOB and FCIP applications. The Pb-free solder bump fabrication process and plating chemistries with performance results and electrical/mechanical characteristics are presented
Keywords :
X-ray chemical analysis; bismuth alloys; chip-on-board packaging; copper alloys; electroplating; environmental factors; flip-chip devices; integrated circuit interconnections; integrated circuit packaging; integrated circuit testing; mechanical strength; mechanical testing; melting point; microassembling; reflow soldering; scanning electron microscopy; shear strength; silver alloys; tin; tin alloys; 200 C; 200 micron; 216 C; 221 C; 227 C; 232 C; 400 micron; 5 micron; Al; Al-metallized daisy-chain test wafers; BT-epoxy substrates; Cu; EDX; FCIP applications; FCOB applications; FR-4 substrates; Pb-free bump interconnections; Pb-free bumps; Pb-free solder bump arrays; Pb-free solder bump electroplating; Pb-free solder bump fabrication process; Pb-free solder bumps; SEM; Sn; Sn solder bumps; Sn-Ag plating solution; Sn-Ag solder bumps; Sn-Ag-Cu solder bumps; Sn-Bi bumps; Sn-Bi solder bumps; Sn-Cu plating solution; Sn-Cu solder bumps; SnAg; SnAgCu; SnBi; SnCu; SnPb; as-plated bump reflow; ball shear tests; bump composition; bump melting point; bump pitch; bumped daisy chain test dice; die shear tests; electrical characteristics; eutectic Sn-Ag composition; eutectic Sn-Cu composition; eutectic Sn-Pb solder bump replacement; five-zone reflow oven; flip-chip applications; flip-chip bonding; flip-chip packaging applications; fountain plating system; high melting point high-Pb alloy solder bump replacement; lead-free solder bumps; mechanical characteristics; mechanical strength; melting point; plated Cu under-bump-metal layer; plating chemistries; post-reflow bump diameter; sequential plating; Bonding; Chemistry; Environmentally friendly manufacturing techniques; Fabrication; Lead; Ovens; Packaging; Sequential analysis; Testing; Tin;
Conference_Titel :
Electronics Manufacturing Technology Symposium, 2000. Twenty-Sixth IEEE/CPMT International
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-6482-1
DOI :
10.1109/IEMT.2000.910738