• DocumentCode
    2959727
  • Title

    Cross-layer Energy and Performance Evaluation of a Nanophotonic Manycore Processor System Using Real Application Workloads

  • Author

    Kurian, George ; Sun, Chen ; Chen, Chia-Hsin Owen ; Miller, Jason E. ; Michel, Jurgen ; Lan Wei ; Antoniadis, Dimitri A. ; Peh, Li-Shiuan ; Kimerling, Lionel ; Stojanovic, Vladimir ; Agarwal, Anant

  • Author_Institution
    Massachusetts Inst. of Technol., Cambridge, MA, USA
  • fYear
    2012
  • fDate
    21-25 May 2012
  • Firstpage
    1117
  • Lastpage
    1130
  • Abstract
    Recent advances in nanophotonic device research have led to a proliferation of proposals for new architectures that employ optics for on-chip communication. However, since standard simulation tools have not yet caught up with these advances, the quality and thoroughness of the evaluations of these architectures have varied widely. This paper provides the first complete end-to-end analysis of an architecture using on-chip optical interconnect. This analysis incorporates realistic performance and energy models for both electrical and optical devices and circuits into a full-fledged functional simulator, thus enabling detailed analyses when running actual applications. Since on-chip optics is not yet mature and unlikely to see widespread use for several more years, we perform our analysis on a future 1000-core processor implemented in an 11nm technology node. We find that the proposed optical interconnect can provide between 1.8x and 4.8x better energy-delay product than conventional electrical-only interconnects. In addition, based on a detailed energy breakdown of all processor components, we conclude that a thermal ring resonators and on-chip lasers that allow rapid power gating are key areas worthy of additional nanophotonic research. This will help guide future optical device research to the areas likely to provide the best payoff.
  • Keywords
    microprocessor chips; nanophotonics; optical interconnections; performance evaluation; 1000-core processor; athermal ring resonators; cross-layer energy; electrical circuits; electrical devices; electrical-only interconnects; energy breakdown; energy models; energy-delay product; full-fledged functional simulator; nanophotonic manycore processor system; on-chip communication; on-chip lasers; on-chip optical interconnect; optical circuits; optical devices; performance evaluation; power gating; processor components; real application workloads; size 11 nm; Optical interconnections; Optical ring resonators; Ring lasers; Routing; System-on-a-chip; Unicast; cache coherence; on-chip networks; photonics;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel & Distributed Processing Symposium (IPDPS), 2012 IEEE 26th International
  • Conference_Location
    Shanghai
  • ISSN
    1530-2075
  • Print_ISBN
    978-1-4673-0975-2
  • Type

    conf

  • DOI
    10.1109/IPDPS.2012.103
  • Filename
    6267916