DocumentCode :
2959910
Title :
Simulation of transients in VLSI packaging interconnections
Author :
Palusinski, O.A. ; Liao, J.C. ; Prince, J.L. ; Cangellaris, A.C.
Author_Institution :
Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
fYear :
1989
fDate :
22-24 May 1989
Firstpage :
404
Lastpage :
409
Abstract :
An approach to electrical analysis of VLSI packaging interconnections using computer simulation is discussed. Corresponding simulation software developed during the course of research on VLSI interconnections is described. Examples of application to prototypical interconnections (two-transmission-line systems joined by a lumped-parameter network and a transmission line terminated by a network of bipolar and MOS transistors) are provided. Simulation results for the above examples are presented and analyzed. The current status of work is discussed, and directions of future research are delineated
Keywords :
VLSI; digital simulation; distributed parameter networks; packaging; transients; MOS transistors; VLSI packaging interconnections; bipolar transistors; computer simulation; electrical analysis; lumped-parameter network; simulation software; transients; two-transmission-line systems; Application software; Computational modeling; Computer simulation; MOSFETs; Packaging; Power system transients; Prototypes; Software prototyping; Transmission lines; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components Conference, 1989. Proceedings., 39th
Conference_Location :
Houston, TX
Type :
conf
DOI :
10.1109/ECC.1989.77781
Filename :
77781
Link To Document :
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