DocumentCode :
2959960
Title :
CMOS / CMOL architectures for spiking cortical column
Author :
Gao, Changjian ; Zaveri, Mazad S. ; Hammerstrom, Dan
Author_Institution :
Dept. of Electr. & Comput. Eng., Portland State Univ., Portland, OR
fYear :
2008
fDate :
1-8 June 2008
Firstpage :
2441
Lastpage :
2448
Abstract :
We present a spiking cortical column model based on neural associative memory, and demonstrate architectures for emulating the cortical column model with nanogrid molecular circuitry. We investigate a number of options for cost-effective hardware with digital CMOS and mixed-signal CMOL, a hybrid CMOS/nanogrid technology. We also give an example of a dynamic learning algorithm that is a suitable match to CMOL implementation.
Keywords :
CMOS integrated circuits; content-addressable storage; neural nets; CMOL architecture; CMOS architecture; cost-effective hardware; digital CMOS; dynamic learning algorithm; hybrid CMOS-nanogrid technology; mixed-signal CMOL; nanogrid molecular circuitry; neural associative memory; spiking cortical column model; Neural networks;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Networks, 2008. IJCNN 2008. (IEEE World Congress on Computational Intelligence). IEEE International Joint Conference on
Conference_Location :
Hong Kong
ISSN :
1098-7576
Print_ISBN :
978-1-4244-1820-6
Electronic_ISBN :
1098-7576
Type :
conf
DOI :
10.1109/IJCNN.2008.4634138
Filename :
4634138
Link To Document :
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