DocumentCode :
2960657
Title :
Characterization and application of interconnect process parameters
Author :
Chou, Alvin ; Chang, Keh-Jeng ; Mathews, Rob ; Wong, Ken ; Wang, Takung ; Wei, Yi-Hen ; Su, Kuan Cheng ; Hsue, Peter
Author_Institution :
Frequency Technol. Inc., San Jose, CA, USA
fYear :
1998
fDate :
23-26 Mar 1998
Firstpage :
189
Lastpage :
191
Abstract :
Interconnect process parameters of a 0.35 μm CMOS process were fully characterized with large numbers of electrical measurements. The characterized parameters were then used with a TCAD tool to calculate the total capacitances of complicated test structures that mimic signal nets in real designs. The excellent agreement between calculation results and electrical measurements of the structures demonstrates that the combination of a TCAD tool and fully characterized interconnect process parameters can provide accurate prediction of interconnect circuit performance
Keywords :
CMOS integrated circuits; circuit CAD; circuit analysis computing; integrated circuit interconnections; integrated circuit metallisation; integrated circuit modelling; integrated circuit testing; software tools; 0.35 micron; CMOS process; TCAD tool; characterized interconnect process parameters; characterized parameters; electrical measurements; interconnect circuit performance prediction; interconnect process parameters; signal nets; test structure capacitance; Capacitance; Delay; Dielectric measurements; Electric variables measurement; Electrical resistance measurement; Integrated circuit interconnections; Signal design; Testing; Thickness measurement; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 1998. ICMTS 1998., Proceedings of the 1998 International Conference on
Conference_Location :
Kanazawa
Print_ISBN :
0-7803-4348-4
Type :
conf
DOI :
10.1109/ICMTS.1998.688066
Filename :
688066
Link To Document :
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