Digital Radio Front-End for High Data Rate Impulse UWB System

Author

Morche, Dominique ; Hameau, Frederic ; Lachartre, David ; Masson, Gilles ; Mounet, Christopher ; Pelissier, Michael ; Helal, Didier ; Smaini, Lydi ; Belot, Didier

Author_Institution

CEA/LETI, Grenoble

fYear

2006

fDate

10-13 Dec. 2006

Firstpage

788

Lastpage

791

Abstract

This paper presents on overview of the two chip integration of a digital radio receiver for wireless communication systems based on ultra wideband (UWB) impulse radio technology. The chips have been integrated in a 130 nm CMOS technology. The front-end performs 1-bit direct sampling of the RF signal. The baseband processing is implemented in a FPGA. The UWB link demonstration runs at 78.125Mpulse/s using polarity and a coding rate of 1/2 which gives a maximum information data rate of 39.1Mb/s (limited by the highest FPGA demodulation rate).

Keywords

CMOS integrated circuits; field programmable gate arrays; radio receivers; ultra wideband communication; CMOS technology; FPGA; RF signal; baseband processing; bit rate 39.1 Mbit/s; digital radio receiver; high data rate impulse UWB system; size 130 nm; wireless communication systems; word length 1 bit; Bandwidth; Baseband; CMOS technology; Demodulation; Digital communication; Digital filters; Filtering; Narrowband; Noise figure; Sampling methods;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on

Conference_Location

Nice

Print_ISBN

1-4244-0395-2

Electronic_ISBN

1-4244-0395-2

Type

conf

DOI

10.1109/ICECS.2006.379907

Filename

4263485