A BiCMOS time-to-digital converter with 30 ps resolution

A time-to-digital converter (TDC) with 32 ps LSB and 2.5 μs measurement range has been implemented in a 0.8 μm BiCMOS process. The TDC is based on a main counter and two separate time digitizers for interpolation inside the clock period. The clock frequency of the counter is 100 MHz and the interpolators are based on dual-slope conversion. According to test results, the single-shot resolution of the TDC is 30 ps (σ-value) and nonlinearity is less than ±5 ps when input time intervals range from 5 ns to 2.5 μs. The conversion time is <6.3 μs. Temperature drift, excluding the temperature dependence of the oscillator, is below ±40 ps in a temperature range of -40-+60°C. The size of this chip, including pads, is 3.4 mm×3.4 mm and its power consumption is 350 mW