DocumentCode :
2960806
Title :
Ultra low voltage CMOS gates
Author :
Berg, Yngvar ; Mirmotahari, Omid ; Norseng, Per Andreas ; Aunet, Snorre
Author_Institution :
Oslo Univ., Oslo
fYear :
2006
fDate :
10-13 Dec. 2006
Firstpage :
818
Lastpage :
821
Abstract :
In this paper we present a CMOS gate which operates on ultra low voltage. We show how to reduce the supply voltage Vdd to Vt without affecting the operational frequency significantly. Moreover, we elaborate on the PDP and EDP improvement compared to footed domino logic CMOS. The paper concludes with measurement from a fabricated chip in a 0.13mum process.
Keywords :
CMOS logic circuits; logic gates; low-power electronics; footed domino logic CMOS; size 0.13 mum; supply voltage; ultra low voltage CMOS gates; CMOS logic circuits; CMOS technology; Circuit synthesis; Clocks; Driver circuits; Energy consumption; Inverters; Leakage current; Low voltage; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on
Conference_Location :
Nice
Print_ISBN :
1-4244-0395-2
Electronic_ISBN :
1-4244-0395-2
Type :
conf
DOI :
10.1109/ICECS.2006.379914
Filename :
4263492
Link To Document :
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