Modeling of Feedback Analog Circuits with VHDL

In this communication we develop an accurate procedure to describe any feedback analog circuit through VHDL. We pay particular attention to the choice of the time parameter which makes possible the discretization of the continuous equations that regulate circuit behavior. An OpAmp buffer is modeled as an example circuit and simulation results are compared with those extracted by transistor level simulation performed by spectre. Model accuracy is evaluated for different values of the input signal and time parameter. Comparison goal is finding the dummy parameter value which gives the best trade-off between accuracy and speed improvement of the VHDL model with respect to the transistor level simulations.