A coding scheme for field-powered RF IC tag systems

Author

Tanaka, S. ; Ishifuji, T. ; Saito, T. ; Shida, M. ; Nagai, K.

Author_Institution

Central Res. Lab., Hitachi Ltd., Tokyo, Japan

fYear

1998

fDate

11-13 June 1998

Firstpage

230

Lastpage

231

Abstract

This paper describes a new coding scheme and its CMOS implementation for field powered RF IC tag systems. The main feature of the new scheme is that it does not require a PLL for clock recovery and the decoding process, and the coding signal produced has 50% duty cycle and contains both clock and data. Also the clock signal generated by the decoder adopting the scheme drives the circuit at the proper time to achieve maximal power efficiency. A test chip has been fabricated with a 0.8 /spl mu/m standard CMOS process. The evaluation test board with this chip operates with 1 mW RF signals and no battery.

Keywords

CMOS integrated circuits; UHF integrated circuits; decoding; encoding; identification; mixed analogue-digital integrated circuits; 0.8 micron; 2 V; 2.45 GHz; 80 muW; CMOS implementation; clock signal; coding scheme; decoder; field-powered RF IC tag systems; CMOS integrated circuits; Circuit testing; Clocks; Decoding; Phase locked loops; Power generation; Radio frequency; Radiofrequency integrated circuits; Signal generators; Signal processing;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 1998. Digest of Technical Papers. 1998 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-4766-8

Type

conf

DOI

10.1109/VLSIC.1998.688095

Filename

688095