Efficient realizations of analysis and synthesis filters based on the 2-D discrete wavelet transform

Author

Chakrabarti, Chaitali ; Ford, Clint Mum

Author_Institution

Dept. of Electr. Eng., Arizona State Univ., Tempe, AZ, USA

Volume

6

fYear

1996

fDate

7-10 May 1996

Firstpage

3256

Abstract

This paper presents folded architectures and scheduling algorithms for computing the 2-D DWT for analysis and synthesis filters. The folded architectures consist of two parallel computation units (one for computations along the rows and the other for computations along the columns) and two storage units to store the intermediate outputs that are generated by the two units. The scheduling algorithms range from those that try to minimise the latency to those that try to minimise the control unit complexity and keep the data flow regular. A comparison of the scheduling algorithms has been included to aid the designer in choosing an algorithm that is best suited for a particular application

Keywords

band-pass filters; digital filters; filtering theory; parallel algorithms; parallel architectures; scheduling; signal synthesis; wavelet transforms; 2-D DWT; 2D discrete wavelet transform; analysis filters; control unit complexity; data flow; folded architectures; intermediate outputs storage; parallel computation units; scheduling algorithms; storage units; synthesis filters; Algorithm design and analysis; Computer architecture; Concurrent computing; Delay; Discrete wavelet transforms; Filter bank; Low pass filters; Scheduling algorithm; Telecommunication computing; Wavelet analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 1996. ICASSP-96. Conference Proceedings., 1996 IEEE International Conference on

Conference_Location

Atlanta, GA

ISSN

1520-6149

Print_ISBN

0-7803-3192-3

Type

conf

DOI

10.1109/ICASSP.1996.550571

Filename

550571