A 20-GHz and 46-GHz, 32x6-bit ROM for DDS Application in InP DHBT Technology

Author

Manandhar, Sanjeev ; Turner, Steven E. ; Kotecki, David E.

Author_Institution

Maine Univ., Orono

fYear

2006

fDate

10-13 Dec. 2006

Firstpage

1003

Lastpage

1006

Abstract

Two 32times6-bit read only memory (ROM) circuits, employing an architecture suitable for use as a phase to amplitude converter for direct digital synthesizers (DDS), have been designed in InP double heterojunction bipolar transistor (DHBT) technology. These ROM designs use a -3.8 V power supply and dissipate 1.95 W and 7.07 W of power respectively. The maximum operating clock frequencies for these designs are simulated to be 20 GHz and 46 GHz respectively.

Keywords

III-V semiconductors; bipolar MIMIC; bipolar MMIC; bipolar memory circuits; direct digital synthesis; heterojunction bipolar transistors; indium compounds; read-only storage; DDS; DHBT; InP Interface; ROM circuits; ROM design; direct digital synthesizer application; double heterojunction bipolar transistor technology; frequency 20 GHz; frequency 46 GHz; phase to amplitude converter; power 1.95 W; power 7.07 W; read only memory circuits; voltage 3.8 V; word length 6 bit; CMOS technology; Circuits; DH-HEMTs; Decoding; Double heterojunction bipolar transistors; Frequency; Indium phosphide; Parasitic capacitance; Read only memory; Synthesizers;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on

Conference_Location

Nice

Print_ISBN

1-4244-0395-2

Electronic_ISBN

1-4244-0395-2

Type

conf

DOI

10.1109/ICECS.2006.379960

Filename

4263538