DocumentCode
2962030
Title
Using simulation to understand capacity constraints and improve efficiency on process tools
Author
Aybar, Manuel ; Potti, Kishore ; LeBaron, Todd
Author_Institution
DMOS 5 Wafer Fab, Texas Instrum. Inc., Dallas, TX, USA
Volume
2
fYear
2002
fDate
8-11 Dec. 2002
Firstpage
1431
Abstract
Finding hidden capacity and maximizing cluster tool throughput is a common goal for today´s semiconductor manufacturers. This presentation discusses a flexible and accurate simulation program capable of modeling a wide range of semiconductor process tools. The simulation program provides visibility and understanding into the internal dependencies and interactions of each process tool. This information provides a solid base from which sound decisions can be made. Simulation results from two case studies will be presented. The real-world capacity improvements, cycle time reductions and cost savings are presented.
Keywords
digital simulation; electronic engineering computing; production engineering computing; semiconductor device manufacture; capacity constraints; capacity improvements; cluster tool throughput; cost savings; cycle time reductions; efficiency; hidden capacity; process tools; semiconductor manufacturers; semiconductor process tools; simulation program; Costs; Instruments; Job shop scheduling; Manufacturing automation; Robots; Routing; Semiconductor device manufacture; Semiconductor process modeling; Software tools; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Simulation Conference, 2002. Proceedings of the Winter
Print_ISBN
0-7803-7614-5
Type
conf
DOI
10.1109/WSC.2002.1166414
Filename
1166414
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