DocumentCode
2962518
Title
iDEA: A DSP block based FPGA soft processor
Author
Hui Yan Cheah ; Fahmy, Suhaib A. ; Maskell, D.L.
Author_Institution
Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, Singapore
fYear
2012
fDate
10-12 Dec. 2012
Firstpage
151
Lastpage
158
Abstract
This paper presents a very lean DSP Extension Architecture (iDEA) soft processor for Field Programmable Gate Arrays (FPGAs). iDEA has been built to be as lightweight as possible, utilising the run-time flexibility of the DSP48E1 primitive in Xilinx FPGAs to serve as many processor functions as possible. We show how the primitive´s flexibility can be leveraged within a general-purpose processor, what additional circuitry is needed, and present a full instruction-set architecture. The result is a very compact processor that can run at high speed, while executing a full gamut of general machine instructions. We provide results for a number of simple applications, and show how the processor´s resource requirements and frequency compare to a Xilinx MicroBlaze soft core. Based on the DSP48E1, this processor can be deployed across next-generation Xilinx Artix-7, Kintex-7, and Virtex-7 families.
Keywords
digital signal processing chips; field programmable gate arrays; DSP block; DSP extension architecture; DSP48E1 primitive; FPGA soft processor; Kintex-7; Virtex-7; Xilinx Artix-7; Xilinx FPGA; Xilinx MicroBlaze soft core; field programmable gate arrays; iDEA; Computer architecture; Digital signal processing; Field programmable gate arrays; Generators; Pipelines; Random access memory; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Technology (FPT), 2012 International Conference on
Conference_Location
Seoul
Print_ISBN
978-1-4673-2846-3
Electronic_ISBN
978-1-4673-2844-9
Type
conf
DOI
10.1109/FPT.2012.6412128
Filename
6412128
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