Dynamic bias schemes for class-C VCOs

Author

Fanori, Luca ; Andreani, Pietro

Author_Institution

Dept. of Electr. & Inf. Technol., Lund Univ., Lund, Sweden

fYear

2011

fDate

14-15 Nov. 2011

Firstpage

1

Lastpage

4

Abstract

In class-C VCOs the trade-off between oscillation amplitude and start-up condition reduces the advantages of this topology with the respect to the traditional class-B operation. In this paper a dynamic bias scheme able to break this ultimate trade-off is presented. Two different topologies are reported. The first VCO uses an active current tail generator, while the second VCO has a passive resistive tail. Both solutions, simulated in a CMOS 65nm process, oscillate at 7.2GHz and show a phase noise of -126dBc/Hz @ 1MHz while drawing 11mA from a 1.2V supply voltage, resulting in a figure-of-merit of -191dBc/Hz.

Keywords

CMOS integrated circuits; electric generators; network topology; oscillations; phase noise; voltage-controlled oscillators; CMOS process; active current tail generator; class-B operation; class-C VCO; dynamic bias scheme; oscillation amplitude; passive resistive tail; phase noise; size 65 nm; start-up condition; supply voltage; Capacitors; GSM; Phase noise; Reliability; Switches; Voltage control; CMOS VCO; Class-C; Dynamic Bias; low Phase Noise;

fLanguage

English

Publisher

ieee

Conference_Titel

NORCHIP, 2011

Conference_Location

Lund

Print_ISBN

978-1-4577-0514-4

Electronic_ISBN

978-1-4577-0515-1

Type

conf

DOI

10.1109/NORCHP.2011.6126718

Filename

6126718