• DocumentCode
    2963017
  • Title

    Precharge Node based Variable Forward Body Bias for Low-Energy LSIs

  • Author

    Jayapal, SenthilKumar ; Manoli, Yiannos

  • Author_Institution
    Freiburg Univ., Freiburg
  • fYear
    2006
  • fDate
    10-13 Dec. 2006
  • Firstpage
    1300
  • Lastpage
    1303
  • Abstract
    Energy efficient LSI is becoming increasingly crucial for battery operated embedded portable applications. To reduce energy per transition and to improve performance for ultra-low voltage circuits, we proposed internal variable forward body bias technique for precharge-evaluate based logic circuits. In the proposed scheme, the forward body bias is applied to high threshold voltage of either the pull-up or the pull-down logic network based on the evaluation transitions. To validate the proposed scheme, simulation results using dual-threshold voltage precharge-evaluate circuits in an industrial 130 nm triple well process technology are discussed.
  • Keywords
    CMOS logic circuits; large scale integration; battery operated embedded portable application; industrial triple well process technology; low-energy LSI; precharge node; pull-down logic network; pull-up logic network; size 130 nm; variable forward body bias; Batteries; Circuit simulation; Computational modeling; Energy efficiency; Large scale integration; Logic circuits; Logic devices; Microelectronics; Power engineering and energy; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on
  • Conference_Location
    Nice
  • Print_ISBN
    1-4244-0395-2
  • Electronic_ISBN
    1-4244-0395-2
  • Type

    conf

  • DOI
    10.1109/ICECS.2006.379720
  • Filename
    4263613