Title :
Low power ACS unit design for the Viterbi decoder [CDMA wireless systems]
Author :
Tsui, Chi-ying ; Cheng, Roger S -K ; Ling, Curtis
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong
Abstract :
In this paper, we address the issues of designing low power VLSI implementation of the Viterbi decoder. We propose a new VLSI architecture for carrying out the add-compare-select (ACS) operation for the Viterbi decoder which can reduce the complexity of the computation. Also a novel pre-computational architecture is proposed to further reduce the power consumption of the ACS unit
Keywords :
VLSI; Viterbi decoding; code division multiple access; computational complexity; mobile communication; ACS unit design; VLSI implementation; Viterbi decoder; add-compare-select operation; complexity; low-power design; power consumption; pre-computational architecture; Circuits; Computer architecture; Convolutional codes; Design engineering; Energy consumption; Maximum likelihood decoding; Multiaccess communication; Power engineering and energy; Very large scale integration; Viterbi algorithm;
Conference_Titel :
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-5471-0
DOI :
10.1109/ISCAS.1999.778000
