Scalable Model for Multi-Standard Phase Locked Loop

The aim of this study is to provide a high-level VHDL-AMS / Matlab time model for multi-standard phase locked loop. The supported standards are GSM, GPS, DCS, Bluetooth, Wifi and WLAN. On top of that, the final block is a scalable model, linked to the VCO, Loop Filter, SigmaDelta architecture and charge pump current. The model can be used to evaluate settling times, channel-to-channel transition times and also the timing to switch from one standard to another one. Together with this model, a methodology is established to compute model parameters.