DocumentCode
296331
Title
Fabrication of high-performance InP MESFETs with in-situ pulse-plated metal gates
Author
Uno, S. ; Hashizume, T. ; Sato, T. ; Hasegawa, H.
Author_Institution
Graduate Sch. of Electron. & Inf. Eng., Hokkaido Univ., Sapporo, Japan
fYear
1996
fDate
21-25 Apr 1996
Firstpage
338
Lastpage
341
Abstract
Although InP has higher saturation velocity and higher thermal conductivity than GaAs, its use in the active channel of electron devices has been limited by lack of suitable Schottky gate technology. The purpose of this paper is to demonstrate that high-performance InP MESFETs with Schottky barrier heights (SBHs)=0.85-0.89 eV can be realized by a novel in-situ electrochemical etching/plating technique. The InP Schottky barriers produced by this electrochemical process are free of interfacial oxides and Fermi level pinning is removed, realizing workfunction-dependent SBHs. High-barrier height, low-leakage and stable InP MESFETs are realized for the first time using this process
Keywords
III-V semiconductors; Schottky barriers; Schottky gate field effect transistors; electroplating; etching; indium compounds; semiconductor device metallisation; 0.85 to 89 eV; InP; InP Schottky barriers; Schottky gate technology; active channel; electrochemical etching; electrochemical plating; fabrication process; high-performance InP MESFETs; in-situ pulse-plated metal gates; Electrochemical processes; Electrodes; Epitaxial layers; Etching; Fabrication; Indium phosphide; MESFETs; Schottky barriers; Schottky diodes; Surface topography;
fLanguage
English
Publisher
ieee
Conference_Titel
Indium Phosphide and Related Materials, 1996. IPRM '96., Eighth International Conference on
Conference_Location
Schwabisch-Gmund
Print_ISBN
0-7803-3283-0
Type
conf
DOI
10.1109/ICIPRM.1996.492048
Filename
492048
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