Author :
Mellier, M. ; Berger, T. ; Duru, R. ; Zaleski, M. ; Luche, M.C. ; Rivoir, M. ; Goldberg, C. ; Wyborn, G. ; Chang, K.-L. ; Wang, Y. ; Ripoche, V. ; Tsai, S. ; Thothadri, M. ; Hsu, W.-Y. ; Chen, Luo-nan
Abstract :
In this work, we demonstrate the capability of Ecmp to meet the 45 nm and 32 nm technology node requirements in terms of topography behavior, the related electrical spread, lithography DOF budget and ULK compatibility.
Keywords :
chemical mechanical polishing; copper; dielectric materials; electrolytic polishing; integrated circuit interconnections; lithography; nanoelectronics; planarisation; Cu; ULK compatibility; copper electrochemical mechanical planarization; electrical spreading; lithography depth-of-focus budget; size 32 nm; size 45 nm; topography behavior; ultra low-k materials; Chemical processes; Copper; Electronic mail; Lithography; Planarization; Semiconductor materials; Sheet materials; Slurries; Substrates; Surfaces;
