Timing mismatch background calibration for time-interleaved ADCs

Time-interleaved analog-to-digital converters (TIADCs) are essential in wide-band communication systems for providing high-speed data conversion. However, TIADCs are sensitive to the sample time mismatch, which results in significantly degraded performance. A new calibration technique is proposed to minimize sample time mismatches among interleaved channels. Correlation between adjacent channels based on zero-crossing detection is utilized. The proposed calibration technique does not require any extra reference signal. Simulation results show that the proposed compensation technique is validated with a high degree of accuracy. For a 4-channel 6-bit TIADC, the undesired spectrum is reduced to below -48dB.