DocumentCode
2964201
Title
IDMA System with Chip Accumulation for Partial Users
Author
Chen, Zhuo ; Song, Guanghui ; Cheng, Jun ; Watanabe, Yoichiro
Author_Institution
Dept. of Intell. Inf. Eng. & Sci., Doshisha Univ., Kyoto, Japan
Volume
2
fYear
2011
fDate
28-29 March 2011
Firstpage
559
Lastpage
562
Abstract
An uncoded IDMA system with chip accumulation for partial users is proposed. The rate-1 accumulators are employed for partial users. Simulation gives an optimal number Ks of partial users for K-user uncoded IDMA system with the lowest BER. Simulation results show that the performance of the proposed system is improved, compared with the conventional IDMA system, especially for few users and in high Eb/N0 levels.
Keywords
error statistics; interleaved codes; multi-access systems; BER; K-user uncoded IDMA system; chip accumulation; interleave-division multiple-access; rate-1 accumulators; AWGN; Bit error rate; Iterative decoding; Receivers; Simulation; Transmitters; IDMA; chip accumulation; multiple access;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Computation Technology and Automation (ICICTA), 2011 International Conference on
Conference_Location
Shenzhen, Guangdong
Print_ISBN
978-1-61284-289-9
Type
conf
DOI
10.1109/ICICTA.2011.425
Filename
5750950
Link To Document