Design of feature extraction circuit for speech recognition applications

This paper presents a hardware-software co-design implementation of feature extraction circuit which can be used for speech recognition applications. Mel-frequency cepstral co-efficients are used to represent the features of the speech. A comparison between a complete software implementation and a co-design with both hardware and software components is brought out for the same circuit. The advantage of the hardware-software co-design is brought out by showing that the delay of execution has decreased to 0.0184 seconds from 17.29 seconds for the complete software implementation approach.The MicroBlaze soft-core processor from Xilinx is used in the hardware-software co-design. The processor frequency is chosen to be 66.67MHz. The Xilinx EDK software is used to design the circuit. The entire work is implemented on Atlys Spartan-6 development board.