DocumentCode
2965828
Title
Covert and Side Channels Due to Processor Architecture
Author
Wang, Zhenghong ; Lee, Ruby B.
Author_Institution
Dept. of Electr. Eng., Princeton Univ., NJ
fYear
2006
fDate
Dec. 2006
Firstpage
473
Lastpage
482
Abstract
Information leakage through covert channels and side channels is becoming a serious problem, especially when these are enhanced by modern processor architecture features. We show how processor architecture features such as simultaneous multithreading, control speculation and shared caches can inadvertently accelerate such covert channels or enable new covert channels and side channels. We first illustrate the reality and severity of this problem by describing concrete attacks. We identify two new covert channels. We show orders of magnitude increases in covert channel capacities. We then present two solutions, Selective Partitioning and the novel random permutation cache (RPCache). The RPCache can thwart most cache-based software side channel attacks, with minimal hardware costs and negligible performance impact
Keywords
cache storage; computer architecture; security of data; RPCache; cache-based software side channel attacks; covert channels; information leakage; processor architecture; random permutation cache; selective partitioning; side channels; Application software; Channel capacity; Computer architecture; Cryptography; Hardware; Information security; Multithreading; Performance analysis; Software performance; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Security Applications Conference, 2006. ACSAC '06. 22nd Annual
Conference_Location
Miami Beach, FL
ISSN
1063-9527
Print_ISBN
0-7695-2716-7
Type
conf
DOI
10.1109/ACSAC.2006.20
Filename
4041191
Link To Document