• DocumentCode
    2965902
  • Title

    An effective shared memory allocator for reducing false sharing in NUMA multiprocessors

  • Author

    Lee, JongWoo ; Cho, Yookun

  • Author_Institution
    Software Res. & Dev. Centre, Hyundai Electron. Ind., Seoul, South Korea
  • fYear
    1996
  • fDate
    11-13 Jun 1996
  • Firstpage
    373
  • Lastpage
    382
  • Abstract
    Non-uniform memory access (NUMA) time is an important issue in the design of large scale shared memory multiprocessors. One implication of NUMA architecture, however, is that locality of reference is crucial to the performance of the entire systems. So exploitation of locality of reference is necessarily supported by one or more system levels for efficient data sharing. Unfortunately, data sharing introduces a problem called false sharing which occurs when several independent objects which may have different access patterns are allocated to the same unit of movable memory (in our case, a page of virtual memory). In this paper we propose a simple and effective shared memory allocation mechanism for reducing the false sharing. Our design goal is to reduce the occurrences of false sharing misses by allocating independent objects that may have different access patterns to different pages. We use execution-driven simulation of real parallel applications to evaluate the effectiveness of our shared memory allocator. Our observation shows that by using our shared memory allocator, considerable amount of false sharing misses can be reduced and so the overhead of memory coherence protocol can also be reduced
  • Keywords
    discrete event simulation; memory protocols; shared memory systems; storage allocation; virtual storage; NUMA multiprocessors; data sharing; execution-driven simulation; false sharing; large scale shared memory multiprocessors; memory coherence protocol; shared memory allocation mechanism; shared memory allocator; virtual memory; Access protocols; Computer architecture; Costs; Electronics industry; Hardware; Large-scale systems; System performance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Algorithms & Architectures for Parallel Processing, 1996. ICAPP 96. 1996 IEEE Second International Conference on
  • Print_ISBN
    0-7803-3529-5
  • Type

    conf

  • DOI
    10.1109/ICAPP.1996.562898
  • Filename
    562898