DocumentCode :
2967177
Title :
Intelligent railway interlocking safety verification based on annotated logic program and its simulator
Author :
Nakamatsu, Kazumi ; Kiuchi, Yosuke ; Chen, W.Y. ; Chung, S.L.
Author_Institution :
School of H.E.P.T., Himeji Inst. of Tech., Japan
Volume :
1
fYear :
2004
fDate :
21-23 March 2004
Firstpage :
694
Abstract :
Railway operation disorder is a serious problem that is expected to be resolved as soon as possible. In order to assist the quick recovery of a disordered railway diagram, we are planning to provide a railway diagram recovery system, which is based on an annotated logic program called EVALPSN (Extended Vector Annotated Logic Program with Strong Negation) with temporal reasoning. The system is based on a railway interlocking safety verification system and a railway diagram simulation system. In this paper, we introduce the ideas of the railway interlocking safety verification system based on EVALPSN and its prototype simulation system with signal control.
Keywords :
logic programming; railway safety; safety systems; temporal reasoning; Extended Vector Annotated Logic Program with Strong Negation; disordered railway diagram simulation system; intelligent railway interlocking safety verification system; railway diagram recovery system; railway operation disorder; railway signal control; temporal reasoning; Circuit simulation; Control system synthesis; Control systems; Intelligent control; Logic programming; Prototypes; Rail transportation; Railway accidents; Railway safety; Virtual prototyping;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Networking, Sensing and Control, 2004 IEEE International Conference on
ISSN :
1810-7869
Print_ISBN :
0-7803-8193-9
Type :
conf
DOI :
10.1109/ICNSC.2004.1297524
Filename :
1297524
Link To Document :
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