DocumentCode
2967893
Title
Digital control with improved performance for boost power factor correction circuits
Author
Bibian, Stéphane ; Jin, Hua
Author_Institution
Dept. of Electr. & Comput. Eng., British Columbia Univ., Vancouver, BC, Canada
Volume
1
fYear
2001
fDate
2001
Firstpage
137
Abstract
In this paper, an approach for the design of a digital controller for a PFC pre-regulator is proposed. The controller is modified to account for large control periods and computational delays, and can therefore be implemented on processors with few available computational resources. Results show that, even with a very low control rate, system specifications can be met using the proposed technique
Keywords
DC-DC power convertors; control system synthesis; digital control; power factor correction; predictive control; PFC pre-regulator; boost power factor correction circuits; computational delays; dead-beat control; digital control; digital controller design; large control periods; predictive control; system specifications; very low control rate; Bandwidth; Circuits; Control systems; Costs; Delay; Digital control; Digital signal processing; Power factor correction; Power supplies; Reactive power;
fLanguage
English
Publisher
ieee
Conference_Titel
Applied Power Electronics Conference and Exposition, 2001. APEC 2001. Sixteenth Annual IEEE
Conference_Location
Anaheim, CA
Print_ISBN
0-7803-6618-2
Type
conf
DOI
10.1109/APEC.2001.911639
Filename
911639
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