Barrier-layer, multilayer-ceramic capacitor processing: effects of termination and plating process parameters

Studies of the effects of termination and plating process parameters on the fabrication of multilayer ceramic capacitors intended for use as surface-mount devices are discussed. Electrical properties such as capacitance, dissipation factor, and insulation resistance are sensitive to plating process parameters used to deposit a nickel barrier layer and a tin/lead solder layer. The parameters in this study included: (1) three capacitor lots; (2) eight termination ink types; (3) seven termination bandwidths; (4) two termination crown heights; (5) the number of coulombs used for nickel plating; and (6) the time and current density for solder plating. Fifty experiments were performed, nine of which were replications to estimate experimental error. As responses, 1830 data points each were measured for the capacitance, dissipation factor (DF), and internal resistance. Four of the inks could be ranked as statistically superior. Termination crown height and bandwidth and solder plating had a significant effect, whereas nickel plating had no effect. Lot variability had a marginal effect on DF and DF spread