• DocumentCode
    296887
  • Title

    3D packaging technology overview and mass memory applications

  • Author

    Terrill, Rob ; Beene, Gary L.

  • Author_Institution
    Texas Instrum. Inc., Dallas, TX, USA
  • Volume
    2
  • fYear
    1996
  • fDate
    3-10 Feb 1996
  • Firstpage
    347
  • Abstract
    In response to the need for significant reductions in size and weight of digital electronic systems, several companies have developed packaging technologies that focus on miniaturization of memory functions. This paper describes the four basic three dimensional (3D) memory packaging technologies. Physical descriptions and sample photographs of the options provided. Metrics of packaging are developed to provide potential users a means of determining which technology might be best suited to their application. The basics of how to apply 3D memory products are also discussed. Consideration of design and test decisions on product cost are discussed. Also provided are examples of how 3D memory modules may be used in both processor multichip module (MCM) applications and in mass memory (solid-state recorder) applications
  • Keywords
    economics; integrated circuit packaging; multichip modules; semiconductor device manufacture; semiconductor device packaging; semiconductor storage; 3D memory modules; 3D packaging technology; MCM; digital electronic systems; mass memory; mass memory applications; memory functions; miniaturization; multichip module; size; solid-state recorder; three dimensional memory packaging; weight; Bonding; Costs; Electronics packaging; Instruments; Integrated circuit packaging; Lead; Solid state circuits; Stacking; Substrates; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Aerospace Applications Conference, 1996. Proceedings., 1996 IEEE
  • Conference_Location
    Aspen, CO
  • Print_ISBN
    0-7803-3196-6
  • Type

    conf

  • DOI
    10.1109/AERO.1996.495988
  • Filename
    495988