Title :
A novel FPGA based virtual-PIG: Cell Matrix with embedded processor
Author :
Kai-feng, Zhang ; Hua-min, Tao ; Shan-zhu, Xiao
Author_Institution :
Nat. Key Lab. of Autom. Target Recognition (ATR), Nat. Univ. of Defense Technol., Changsha, China
Abstract :
Bio-inspired hardware has made great progress in the field of fault-tolerance during the past decades. This paper presents a novel architecture, the virtual-PIG (VPIG), due to the lack of an appropriate platform for the bio-inspired hardware research. The virtual-PIG is derived from PIG (Processing Integrated Grid) and RISA (Reconfigurable Integrated System Array). The VPIG cluster consists of a MCU and four cells which are similar to the PIG. The architecture of the VPIG is analyzed in details, and its FPGA implementation is also described. It is noteworthy that our MCU has the capability of the customizable instruction. To verify the VPIG, three experiments were conducted, including self-replication, 1-bit full adder evolution and 2-bit counter with self-repair. The experimental results show that our proposed VPIG has the feature of self-replication, self-evolution and self-repair, making it very suitable for bio-inspired hardware applications.
Keywords :
fault tolerant computing; field programmable gate arrays; multiprocessing systems; 1-bit full adder evolution; 2-bit counter; MCU; RISA; VPIG; bio-inspired hardware; cell matrix; customizable instruction; embedded processor; fault-tolerance; novel FPGA based virtual-PIG; processing integrated grid; reconfigurable integrated system array; self-evolution feature; self-repair feature; self-replication feature; Computer architecture; Fault tolerance; Field programmable gate arrays; Hardware; Microcontrollers; Shift registers;
Conference_Titel :
Adaptive Hardware and Systems (AHS), 2012 NASA/ESA Conference on
Conference_Location :
Erlangen
Print_ISBN :
978-1-4673-1915-7
Electronic_ISBN :
978-1-4673-1914-0
DOI :
10.1109/AHS.2012.6268657
