Math2Mat: From Octave/Matlab to VHDL

Author

Thoma, Yann ; Messerli, Etienne ; Starkier, Michel ; Molla, Daniel ; Masle, Sebastien ; Bianchi, C. ; Gubler, O. ; Magliocco, C. ; Crausaz, P. ; Tâche, Samuel ; Prêtre, Denis ; Trolliet, Gregory

Author_Institution

Reconfigurable & Embedded Digital Syst. Inst., Univ. of Appl. Sci. Western Switzerland, Yverdon-les-Bains, Switzerland

fYear

2012

fDate

25-28 June 2012

Firstpage

264

Lastpage

271

Abstract

Math2Mat aims at automatically generating a VHDL description of a mathematical description written in Octave/Matlab. The generation creates a synthesizable RTL description using floating point operators (32 or 64 bits) combined in a fully pipelined way. Emphasis is put on the throughput attainable by the design, especially in the ”for loop” implementation. The software also offers a graphical user interface, letting the developer manage the different parameters before generation. Verification can also be launched from the software, a SystemVerilog testbench being automatically generated.

Keywords

automatic test pattern generation; floating point arithmetic; formal verification; graphical user interfaces; hardware description languages; pipeline processing; Math2Mat; Matlab; Octave; RTL; SystemVerilog; VHDL; automatic pattern generation; floating point operator; formal verification; graphical user interface; mathematical description; pipeline processing; Adaptive systems; Clocks; Hardware; MATLAB; NASA; Pipelines; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Adaptive Hardware and Systems (AHS), 2012 NASA/ESA Conference on

Conference_Location

Erlangen

Print_ISBN

978-1-4673-1915-7

Electronic_ISBN

978-1-4673-1914-0

Type

conf

DOI

10.1109/AHS.2012.6268661

Filename

6268661