Modeling and quantification of substrate noise induced by interconnects in SOCs

Author

Aghnout, Soraya ; Masoumi, Nasser

Author_Institution

Univ. of Tehran, Tehran

fYear

2007

fDate

2-5 Sept. 2007

Firstpage

1

Lastpage

6

Abstract

Interconnects carrying high-frequency signals are of the most important sources of substrate noise. This paper computes the amount of the interconnect-induced substrate noise. We develop a substrate extraction tool based on the Finite Difference Method and combine the extracted output model with accurate interconnect models. Through simulation of the complete substrate-interconnect model, we investigate the impacts of frequency and several interconnect geometrical parameters on the amount of the substrate noise.

Keywords

finite difference methods; integrated circuit interconnections; substrates; system-on-chip; SOC; accurate interconnect models; finite difference method; quantification; substrate extraction; substrate noise; substrate-interconnect model; Capacitance; Circuit noise; Coupling circuits; Finite difference methods; Integrated circuit interconnections; Semiconductor device modeling; Semiconductor device noise; Solid modeling; Substrates; Very large scale integration; Substrate coupling noise; VLSI circuits; capacitive coupling; finite difference method; interconnect;

fLanguage

English

Publisher

ieee

Conference_Titel

Design & Technology of Integrated Systems in Nanoscale Era, 2007. DTIS. International Conference on

Conference_Location

Rabat

Print_ISBN

978-1-4244-1277-8

Electronic_ISBN

978-1-4244-1278-5

Type

conf

DOI

10.1109/DTIS.2007.4449482

Filename

4449482