Integration of a concurrent signature monitoring mechanism in a System-on-a-Chip

In this work, an IP infrastructure is presented that provides concurrent signature monitoring to the designed system-on-a-chip (SoC). Such mechanisms ensure application code consistency and research focus integration inside high performance processor cores. A low-cost but very effective approach is offered, which has been successfully integrated in a prototype targeting safety critical applications. The advantages of the integration of this simple unit in a SoC and its characteristics are also presented.