CMOS buffer amplifier for wide bandwidth applications

Author

Abdel-Hafez, Ibrahim L. ; Khalaf, Yaser A. ; Farag, Fathi A.

Author_Institution

Zagazig Univ., Zagazig

fYear

2007

fDate

2-5 Sept. 2007

Firstpage

56

Lastpage

59

Abstract

This paper describes a new configuration of a CMOS buffer circuit. The new buffer is based on a Flipped Voltage Follower (FVF) with feedback in order to enhance the transconductance of the buffer as well as linearity. The proposed cell can be used as a very high bandwidth buffer to drive high capacitive loads. The employed feedback enhances the overall transconductance while minimizing the loading effect. The circuit is designed and simulated by using 0.13 mum CMOS process. The proposed buffer is compared with a conventional voltage-follower and flipped-voltage-follower for a capacitive load up to 30 pF. Simulation results show a bandwidth of 145 MHz for a capacitive load of 30 pF. The power consumption is 2.4 mw for 1.5 V power supply.

Keywords

CMOS analogue integrated circuits; buffer circuits; operational amplifiers; CMOS buffer amplifier; capacitance 30 pF; flipped voltage follower; frequency 145 MHz; power 2.4 mW; power consumption; power supply; size 0.13 mum; voltage 1.5 V; Bandwidth; CMOS process; Capacitance; Circuit simulation; Energy consumption; Feedback; Linearity; Transconductance; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Design & Technology of Integrated Systems in Nanoscale Era, 2007. DTIS. International Conference on

Conference_Location

Rabat

Print_ISBN

978-1-4244-1277-8

Electronic_ISBN

978-1-4244-1278-5

Type

conf

DOI

10.1109/DTIS.2007.4449492

Filename

4449492