• DocumentCode
    2970070
  • Title

    On the methodology of assessing hot-carrier reliability of analog circuits

  • Author

    Le, Huy ; Marcoux, Paul.J. ; Jiang, Wei ; Chung, Jason E.

  • Author_Institution
    Agilent Technol., Santa Clara, CA, USA
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    20
  • Lastpage
    23
  • Abstract
    An integrated methodology for assessing analog hot-carrier reliability is proposed. Taking advantage of the unique requirements of analog circuits as well as the well-developed circuit analysis techniques, the methodology focuses on the characterization and modeling of ΔVT and Δμ (as a function of hot-carrier degradation) at the device level and seeks to model circuit-level DC performance parameters degradation through analytical expressions derived from SPICE Model 1
  • Keywords
    SPICE; analogue integrated circuits; hot carriers; integrated circuit reliability; SPICE model; analog integrated circuit; hot carrier reliability; Analog circuits; Circuit analysis; Circuit simulation; Degradation; Equations; Hot carriers; Integrated circuit reliability; Integrated circuit technology; Ring oscillators; SPICE;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Reliability Workshop Final Report, 2000 IEEE International
  • Conference_Location
    Lake Tahoe, CA
  • Print_ISBN
    0-7803-6392-2
  • Type

    conf

  • DOI
    10.1109/IRWS.2000.911893
  • Filename
    911893
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2970070