DocumentCode :
2970845
Title :
Methods for increasing burn in efficiency for DRAMs
Author :
Nierle, Klaus ; Norris, Alan
Author_Institution :
Infineon Technol., Essex Junction, VT, USA
fYear :
2000
fDate :
2000
Firstpage :
183
Lastpage :
184
Abstract :
Randomly distributed process defects are the major contributor to semiconductor component reliability failures. DRAM manufacturers rely on module burn-in (BI) to achieve required field failure rates. In this paper, we describe the implementation of Static BI concept which allows for activation of multiple word lines while leaving sense amps set to avoid the conventional BI problems
Keywords :
DRAM chips; failure analysis; integrated circuit reliability; integrated circuit testing; DRAM; burn-in efficiency; failure analysis; multiple word lines; process defect; reliability testing; semiconductor component; Bismuth; Costs; Random access memory; Rivers; Semiconductor device manufacture; Semiconductor device reliability; Stress; Temperature; Voltage; Writing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Reliability Workshop Final Report, 2000 IEEE International
Conference_Location :
Lake Tahoe, CA
Print_ISBN :
0-7803-6392-2
Type :
conf
DOI :
10.1109/IRWS.2000.911935
Filename :
911935
Link To Document :
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