Design and Implement of MVB BUS Controller Based FPGA

This paper introduces the TCN MVB (Multifunction Vehicle Bus) communication mechanism and characteristics. On this basis, a method of VHDL language is designed for the core part of MVBC (MVB bus controller), such as the Manchester encoding and decoding, CRC check functions, etc. Among them, the bus´s CRC checksum data is formed with a double check of the 8-bit check sequence, including the 7 CRC checksum and an even parity bit. As different frame formats of MVB bus, serial CRC algorithm is choosed. Eventually, the right simulation waveforms of the cores of MVBC is obtained and realized on FPGA hardware.