Abstract :
The following topics are dealt with: embedded systems; application-specific algorithms and architectures; reconfigurable and real-time system; HW/SW co-design; high performance computing; optimising multiprocessor and NoC performance, QoS and reliability; power-aware design; MPSoC analysis and synthesis; memory and communication architecture; SystemC synthesis subset standard; compilation techniques for CGRAs; Network-on-Chip systems; accelerating system simulation; embedded software performance optimization; and multi-core systems.
Keywords :
C language; application specific integrated circuits; embedded systems; hardware-software codesign; logic design; memory architecture; microprocessor chips; multiprocessing systems; network-on-chip; power aware computing; program compilers; reconfigurable architectures; software performance evaluation; CGRA; HW/SW co-design; MPSoC analysis; MPSoC synthesis; NoC performance; QoS; SystemC synthesis subset standard; accelerating system simulation; application-specific algorithms; application-specific architectures; communication architecture; compilation techniques; embedded software performance optimization; embedded systems; hardware/software codesign; high performance computing; memory architecture; multicore systems; network-on-chip systems; optimising multiprocessor; power-aware design; real-time system; reconfigurable system; reliability; system synthesis;
Conference_Titel :
Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2010 IEEE/ACM/IFIP International Conference on
Conference_Location :
Scottsdale, AZ
Print_ISBN :
978-1-6055-8905-3
