DocumentCode
2971133
Title
Machine architecture and algorithm design
Author
Bierman, Keith H.
Author_Institution
Cydrome, San Jose, CA, USA
fYear
1988
fDate
7-9 Dec 1988
Firstpage
390
Abstract
The author considers how three classes of architecture, namely, scalar, vector, and multiple functional unit (MFU), impact on the algorithm design requirements of numerical correctness and speed. It is concluded that recasting scalar algorithms into vector form is becoming less necessary. Vector machines have been extended to enable a wider range of codes to achieve speedup, and MFU machines promise to achieve maximum speedup of scalar algorithms, and have the potential to provide better numerics
Keywords
algorithm theory; computer architecture; algorithm design; machine architecture; multiple functional unit machine; scalar architecture; vector architecture; Algorithm design and analysis; Arithmetic; Bandwidth; Gain measurement; Hardware; Microprocessors; Product safety; Size measurement; Sorting;
fLanguage
English
Publisher
ieee
Conference_Titel
Decision and Control, 1988., Proceedings of the 27th IEEE Conference on
Conference_Location
Austin, TX
Type
conf
DOI
10.1109/CDC.1988.194337
Filename
194337
Link To Document