Title :
Design-for-Debugging of application specific designs
Author :
Potkonjak, M. ; Dey, S. ; Wakabayashi, K.
Author_Institution :
C&C Res. Labs., NEC USA, Princeton, NJ, USA
Abstract :
We address the problem of considering debugging requirements during high level synthesis by providing low-cost hardware support and scheduling and assignment methods for ensuring controllability and observability of the user specified variables. Two key conceptually new design ideas that enable efficient debugging are developed: pipelining of debugging variables for improving their scheduling and assignment freedom and use of I/O buffers for improving resource utilization of I/O pins. The provably optimal bounds for the maximum cardinality of the set of controllable and observable variables for a given design specification are derived. A polynomial time complexity synthesis algorithm for achieving the bounds is developed. The minimization of hardware overhead gives rise to a combinatorial optimization problem which is solved using a non-greedy heuristic algorithm. The effectiveness of the proposed Design-for-Debugging approach is demonstrated on several examples.
Keywords :
application specific integrated circuits; circuit CAD; computational complexity; design for testability; high level synthesis; Design-for-Debugging; combinatorial optimization; controllability; debugging requirements; hardware support; high level synthesis; observability; polynomial time complexity; scheduling; synthesis algorithm; Controllability; Debugging; Hardware; High level synthesis; Observability; Optimal control; Pins; Pipeline processing; Polynomials; Resource management;
Conference_Titel :
Computer-Aided Design, 1995. ICCAD-95. Digest of Technical Papers., 1995 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-8186-8200-0
DOI :
10.1109/ICCAD.1995.480026