DocumentCode :
2977448
Title :
Integrated Heuristic for Hardware/Software Co-design on Reconfigurable Devices
Author :
Peng Liu ; Jigang Wu ; Yongji Wang
Author_Institution :
Sch. of Comput. Sci. & Software Eng., Tianjin Polytech. Univ., Tianjin, China
fYear :
2012
fDate :
14-16 Dec. 2012
Firstpage :
370
Lastpage :
375
Abstract :
Hardware/Software (HW/SW) partitioning and scheduling are essential to the embedded systems. In this paper, a hybrid algorithm derived from Tabu Search and Simulated Annealing is proposed for solving the HW/SW partitioning problem. The virtual hardware resource is set to implement the customized Tabu Search. Earliest-Deadline-First strategy is introduced to describe the reconfiguration of FPGA. Moreover, an algorithm combining the Breadth-First-Search with Depth-First-Search is proposed for HW/SW tasks scheduling to fit for the feature of reconfigurable systems. Experimental results show that, the proposed algorithms produce better performance than the previoPus methods cited in this paper.
Keywords :
field programmable gate arrays; hardware-software codesign; processor scheduling; reconfigurable architectures; search problems; simulated annealing; FPGA reconfiguration; HW-SW partitioning problem; HW-SW task scheduling; breadth-first-search algorithm; customized Tabu search; depth-first-search algorithm; embedded systems; hardware-software codesign; hardware-software partitioning; hardware-software scheduling; hybrid algorithm; integrated heuristics; reconfigurable device; reconfigurable systems; simulated annealing; virtual hardware resource; Field programmable gate arrays; Hardware; Partitioning algorithms; Scheduling; Scheduling algorithms; Software; Software algorithms;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Computing, Applications and Technologies (PDCAT), 2012 13th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-0-7695-4879-1
Type :
conf
DOI :
10.1109/PDCAT.2012.83
Filename :
6589307
Link To Document :
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