DocumentCode
2977776
Title
High reliability assembly of chip scale packages
Author
Partridge, Julian P. ; Hart, Curtis ; Boysan, Paul ; Surratt, Bob ; Foehringer, Richard
Author_Institution
XeTel Corp., Austin, TX, USA
fYear
1997
fDate
13-15 Oct 1997
Firstpage
274
Lastpage
283
Abstract
Ball Grid Array (BGA) packages with 1.27 mm pitch arrays are now being extended to fine pitch BGAs, or Chip Scale Packages (CSP) with ball diameters of 0.3 mm and array pitches as small as 0.5 mm. The current work analyzes the impact of integrating such packages into a high volume SMT assembly line and examines the impact of process and board variables on the reliability of the total assembly. The CSP chosen for the current study was a 0.75 mm pitch CSP scheduled to replace the 0.5 mm lead pitch Thin Small Outline Package (TSOP) currently used in high volume, small form factor, flash memory products. The CSP dimensions of approximately 5.6 mm by 7.4 mm represents an 80% reduction in package area compared to the traditional TSOP, with a footprint of 12 mm by 20 mm. The study examines the effect of solder paste printing parameters, flux-only assembly, and printed circuit board surface finishes such as immersion gold and solder-leveling. Solder paste volume measurements were made on over 2800 individual CSP pads during the builds using an in-line, automated laser scanning profilometer. Reliability test vehicles were assembled using CSPs, TSOPs and other surface mount components, prior to performing accelerated thermal cycling tests from 0°C to 100°C, and 40°C to 85°C. CSP placements were performed using optimized high speed chip placers to place CSPs at rates of up to 5 parts per second. Interim reliability test results after four months of testing are presented with a discussion of TSOP versus MicroBGA package construction
Keywords
assembling; fine-pitch technology; integrated circuit packaging; integrated circuit reliability; life testing; soldering; surface mount technology; 0 to 100 degC; 0.5 to 1.27 mm; MicroBGA package; accelerated thermal cycling tests; array pitches; automated laser scanning profilometer; ball diameters; ball grid array packages; board variables; chip scale packages; fine pitch BGAs; flash memory products; flux-only assembly; high volume SMT assembly line; package area; reliability; solder paste printing parameters; solder paste volume measurements; surface finishes; surface mount components; Assembly; Chip scale packaging; Electronics packaging; Flash memory; Lead; Printed circuits; Printing; Surface finishing; Surface-mount technology; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Manufacturing Technology Symposium, 1997., Twenty-First IEEE/CPMT International
Conference_Location
Austin, TX
ISSN
1089-8190
Print_ISBN
0-7803-3929-0
Type
conf
DOI
10.1109/IEMT.1997.626930
Filename
626930
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