Title :
The means of the differential amplifier input offset voltage reduction
Author_Institution :
Dept. of Comput. Eng., VGTU, Vilnius, Lithuania
Abstract :
The input offset voltage of the differential amplifier based on the bipolar junction transistors, which operate at high current density, is analysed in this work. An analytical approach based on the equations in the explicit form is used to determine the input offset voltage reduction means. The obtained results are tested using numerical simulation of the differential amplifier.
Keywords :
bipolar transistors; differential amplifiers; numerical analysis; voltage control; bipolar junction transistors; differential amplifier; input offset voltage reduction means; numerical simulation; Current density; Differential amplifiers; Equations; Integrated circuits; Junctions; Mathematical model; Transistors;
Conference_Titel :
Electronics Conference (BEC), 2010 12th Biennial Baltic
Conference_Location :
Tallinn
Print_ISBN :
978-1-4244-7356-4
Electronic_ISBN :
1736-3705
DOI :
10.1109/BEC.2010.5629805
