• DocumentCode
    2978545
  • Title

    A BCD priority encoder designed by reversible logic

  • Author

    Jun-Chao Wang ; Yu Pang ; Yang Xia

  • Author_Institution
    Sch. of Optoelectron. Eng., Chongqing Univ. of Posts & Telecommun., Chongqing, China
  • fYear
    2012
  • fDate
    17-19 Dec. 2012
  • Firstpage
    318
  • Lastpage
    321
  • Abstract
    In digital IC designing, energy dissipation has already become a crucial factor that is taken into consideration. Since irreversible computing is one of the most significant cause of energy dissipation, designing digital circuit by reversible logic is an efficient way to decline the energy dissipation of the circuit. While BCD encoder is one of the most common unit circuits, existing BCD encoders are all designed in irreversible way. Thus we propose a new design of BCD priority encoder by reversible logic. This revised encoder not only resolves the problem of messy codes, but also declines certain amount of energy dissipation by utilizing reversible logic.
  • Keywords
    encoding; integrated circuit design; logic circuits; BCD priority encoder; digital IC design; energy dissipation; irreversible computing; messy codes; reversible logic; unit circuits; Abstracts; Decoding; Logic gates; Nanotechnology; BCD Priority Encoder; CNOT Gate; Quantum Cost; Reversible Logic; TOFFOLI Gate;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Wavelet Active Media Technology and Information Processing (ICWAMTIP), 2012 International Conference on
  • Conference_Location
    Chengdu
  • Print_ISBN
    978-1-4673-1684-2
  • Type

    conf

  • DOI
    10.1109/ICWAMTIP.2012.6413503
  • Filename
    6413503